Semiconductor elements (hereinafter also simply referred to as “elements”) configured with various semiconductor materials such as ICs prepared using silicon semiconductors and organic EL elements prepared using organic semiconductors are usually produced by repeatedly forming a matrix of multiple elements on a wafer substrate, then dicing the substrate into individual elements known as chips.
In the description below, a wafer substrate having multiple semiconductor elements formed thereon (pre-dicing state) is also referred to as “a semiconductor wafer”. Semiconductor elements prepared by once dicing semiconductor elements in the semiconductor wafer into individual chips, thereafter rearranging only those chips of acceptable quality on a sheet of the same shape as the wafer substrate, are also understood to be included in the semiconductor wafer.
In addition to a basic element structure, a semiconductor element is provided with various wiring circuit structures (may be referred to as wiring circuit layers) during the stage of a semiconductor wafer to achieve functional enhancement of the element and for other purposes. Examples of such wiring circuit structures include redistribution layers.
As shown in FIG. 7, an element 200 with a wiring circuit structure 100 added thereto is one semiconductor device provided with a connection conductor 101 that facilitates connection with an external conductor (external circuit and the like), compared with the original element simply having an exposed electrode 201. In FIG. 7, the electrode 201 of the element is illustrated as if it is much protruded from the element for the sake of emphasis, so as to indicate its position clearly. In the reality, however, the amount of protrusion of the electrode is small, and the wiring circuit structure 100 and the element 200 are in close contact with each other because the upper face of the wiring circuit structure 100 is made of a flexible adhesive layer and the like.
A known method of providing a wiring circuit structure for an element comprises forming a bump on an electrode of each element during the stage of a semiconductor wafer, superposing thereon a separately formed wiring circuit structure of wafer size, and connecting them to each other by pressing or melt-adhering a terminal of the wiring circuit structure to the bump of each element.
Here, a stud bump is representative of the bump formed on the electrode of an element (e.g., JP-A-2008-124077). A stud bump 310 is formed by melting a tip 301 of a wire 300 of a bump metal (mainly gold) into a ball, as shown in FIG. 8(a), then connecting the ball to the electrode of an element, as shown in FIG. 8(b), and cutting the wire in the vicinity of the ball, as shown in FIG. 8(c), to leave the tip containing the ball on the electrode.
A wiring circuit structure of wafer size is a structure wherein a large number of individual wiring circuit structures assemble together in a way such that their positions correspond to those of the individual elements in the semiconductor wafer, the wiring circuit structures being formed in predetermined positions on one insulating substrate having a large area.
FIG. 9(a) shows a state wherein a stud bump 310 is formed on each electrode 201 of a semiconductor element 200, and a terminal of a wiring circuit structure 100 is connected thereto. In the figure, the wiring circuit structure 100 is illustrated as a structure wherein a conductor pattern 102 is present on a base insulating layer 101, and a terminal 103 is formed on the conductor pattern. In some cases, however, the structure, has the conductor pattern and even the terminal 103 covered by an adhesive layer.
In the connection shown in FIG. 9(a), variation of the height of the stud bump 310 can reduce the connection reliability. In contrast, in JP-A-2008-124077, for example, the influence of height variation is reduced by interposing a conductive paste in the connection.
Referring to FIG. 9(a), when the terminal 103 of the wiring circuit structure 100 is made of a solder, any variation of the height of the partner stud bump 310 prevents uniform pressurization in bonding each bump and the corresponding terminal. For example, in pressure-bonding together a bump taller than other bumps (more protruded from the electrode surface than the other bumps) and the terminal, an excess pressure is exerted. In this case, as shown in FIG. 9(b), the stud bump 310 can fret in the terminal 103 deeply, which in turn causes the terminal 103 to be much deformed and come in contact with the electrode (usually, aluminum) 201 of the element, so that there are apprehensions of corrosion of the electrode due to contact with the solder which is the material for the terminal.
It is an object of the present invention to provide a structure for a wiring circuit in connecting the wiring circuit structure to a semiconductor element having a bump provided on an electrode thereof, wherein the structure is capable of suppressing the excess compression of the bump on the element side and the terminal of the wiring circuit structure.